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ULJC-L : Ultra Low Jitter Clock
Ultra Low Phase Noise, Low Noise LDO Regulator
Á¦ Á¶ »ç : SELLARZ
¸ðµ¨¸í(ÄÚµå) : ULJC-L
ÆǸŰ¡°Ý : 50,000 ¿ø  
ÁÖÆļö(Frequency) Çʼö :
¼ö  ·® :    
°¡  °Ý :
50,000
 ¿ø  
Total :
 ¿ø
 
¹Ù·Î±¸¸Å Àå¹Ù±¸´Ï ´ã±â WishList ÃßõÇϱâ
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ULJC-L Àº ¿Àµð¿ëÀ¸·Î ¼³°èµÈ Ultra Low Jitter Clock ÀÔ´Ï´Ù. Low Noise LDO Regulator ȸ·Î°¡ Àû¿ëµÇ¾î 4V ÀÇ ³·Àº °ø±Þ Àü¾Ð¿¡¼­µµ ¾ÈÁ¤ÀûÀ¸·Î ÀÛµ¿ÇÏ°í Àü·ù¼Ò¸ð·®Àº 10mA·Î ±â±âÀÇ Àü¿øºÎ¿¡ ¿µÇâÀ» ÁÖÁö ¾ÊÀ» Á¤µµÀÇ ¸Å¿ì ³·Àº Àü·Â·®À» »ç¿ëÇÕ´Ï´Ù. ¿Àµð¿À¿ë Ŭ·°À¸·Î ¸¹ÀÌ »ç¿ëµÇ´Â Crystek ÀÇ CVHD-950 °úÀÇ ºñ±³Ç¥¸¦ ÂüÁ¶ ¹Ù¶ø´Ï´Ù.

 

<¿¬°á ÄÉÀ̺í & ¸¶¿îÆ® ¿É¼Ç>

°ø±¸±â°£ µ¿¾È Right Angle ŸÀÔÀÇ SMA Cable(25cm)°ú  ¼³Ä¡¿¡ ÇÊ¿äÇÑ Å¸ÀÌ ¸¶¿îÆ®°¡ Á¦°øµË´Ï´Ù

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1. Output : LVCMOS

2. Input Voltage Range : 4V ~ 15V(Built in LDO Regulator)

3. Input Current : 10mA Typical, 15mA Max

4. Temperature Range : -20¡ÆC to +80¡ÆC

5. Rise/Fall Times        : 0.8nsec Max @20% to 80% Vdd

6. Frequency Stability : ¡¾10ppm

7. Typical Phase Noise(50MHz) : 

             1KHz   -149 dBc/Hz

       10KHz  -163 dBc/Hz

       100KHz -171 dBc/Hz

       1MHZ  -172 dBc/Hz

8. Aging(1st year) : < ¡¾1ppm 

9. Output Connector : Female SMA 

10. Size : 20 x 13 x 4, 40 x 20 x 10(Ä¿³ØÅÍ Æ÷ÇÔ)/(W x D x H:mm)

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<Frequency>

- 10.000000 MHz

- 11.289600 MHz

- 12.000000 MHz

- 12.288000 MHz

- 12.500000 MHz

- 14.318000 MHz

- 16.934400 MHz

- 18.432000 MHz

- 20.000000 MHz

- 22.579200 MHz

- 24.000000 MHz

- 24.576000 MHz

- 25.000000 MHz

- 27.000000 MHz

- 30.000000 MHz

- 40.000000 MHz

- 45.158400 MHz

- 48.000000 MHz

- 49.152000 MHz

- 50.000000 MHz

- 54.000000 MHz

 

¼¿¶óÁîÀüÀÚ     »ç¾÷ÀÚµî·Ï¹øÈ£ : 109-08-70401    
ÁÖ¼Ò : ¼­¿ï½Ã °­¼­±¸ ¾çõ·Î 94, ´ë¼Ûºôµù 2Ãþ 202È£     TEL: 02-3665-3683
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